Development of Concepts and Methods for Reliability Evaluation of Mechatronic Systems in Early Development Phases
09.2002 - 12.2009, DFG - Researcher Group 460: WU 245/3-1, 3-2, 3-3
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Sub-Project TP6: Methods for Evaluation and Improvement of the Reliability of Data-Processing Microelectronic Hardware Components
The reliability of a complex mechanical system highly depends on the reliability of the Data Processing "Embedded System". The aim of the project is the evaluation and improvement of the reliability of the underlying Micro-Electronic Hardware for the Data Processing System in early phases of the design. The functionality of the embedded system is implemented in both Hardware and Software, in the context of Hardware / Software Codesign, hence the reliability issues of both areas cannot be seperated. The design complexity of the hardware part in embedded systems has been rapidly increasing. This gave rise to three dominant sources of errors:
- Design errors.
- Production defects.
- Permenant, transient, and intermittent faults during operation.
Illustration TP6-1 below shows the life cycle of a microelectronic system and the sources of errors that might arise in the different phases.
Usually the differnt kinds of errors are considered in different phases of the design. Nevertheless, deeper analysis shows that these errors can be approached with similar algorithms, which rises the issue of having them all considered, through the use of a unified method, as early as possible in the design cycle. In order to support the recognition of the above mentioned errors and tolerance against them at the beginning of the design, procedures are to be compiled into two areas:
- Development of a uniform method for the recognition and diagnosis of the errors.
- Automatic design of fault tolerant circuits: The so far different, partially contradictory, procedures for the design of verifiable circuits ("Synthesis for Verifiability), testable and self-checkable circuits ("Synthesis for Testability") and fault tolerant and online testable circuits are to be unified. The reliability of such circuits is to be verified with the procedures developed in 1. In praticualr, the new requirements resulting from the current technology development (e.g. ultra-high integrated systems) and new possibilites (e.g. self recognition and self repair) are to be considered.