Near-sensor Computing Using Low-cost Stochastic Circuits

Keywords: "Near-sensor computing", "Stochastic circuits", "Hardware architectures for classification problems"

Many emerging computing systems follow the “sensory swarm” paradigm, where acquisition of data by sensors is tightly intertwined with computations on these data. In applications like environmental monitoring, surveillance of remote areas and health data tracking by implantable devices, the sensor nodes are extremely resource-restricted. They cannot include high-performance microprocessors to run software that processes the acquired raw sensor data, suggesting the need to transmit these data to a powerful “infrastructural core” via wireless links. Near-sensor computing is a concept that aims at avoiding the transmission of raw data over relatively slow, power-hungry and potentially unreliable and insecure communication channels. This is achieved by dedicated hardware blocks that process sensor data directly at their source in a resource-efficient manner. Near-sensor computing is particularly promising for applications that involve classification, because the amount of data to be analyzed is immense and the gain from replacing their transmission by a computation at the sensor node is particularly high.

This project aims at developing methods to realize low-cost and power-efficient hardware circuits for near-sensor computing following the Stochastic Computing paradigm. Stochastic computing provides extremely compact, error-tolerant and low-power implementations of complex functions, but at the expense of longer computation times and some degree of inaccuracy. This makes stochastic circuits (SCs) especially attractive for near-sensor computing, where the processed sensor data are inaccurate anyway and computations tend to occur infrequently. A special focus of this project will be the SC realization of neural networks (NNs) used for classification tasks, from lightweight NNs to fully-fledged convolutional NNs for deep learning. The project will search for effective representations of NNs by stochastic circuits. The desired ability to handle large and complex NNs will necessitate various advances in the theoretical foundations of stochastic computing, including a better understanding of correlations, developing a theory of random number generation for SCs, and investigating hybrid stochastic-binary architectures. The theoretical findings together with the NN structures developed will yield a synthesis and optimization methodology. To this end, the project will be organized in six tasks and two closely intertwined areas, one focusing on theory and one on applications. Moreover, we will continue our longstanding and fruitful collaboration with Prof. John P. Hayes of University of Michigan, Ann Arbor, one of the leading scientists in the SC domain. The research in this project has the potential to bring the capabilities of IoT systems to the next level by introducing intelligence into tiny devices for applications where the advantages of stochastic circuits: small size, low power consumption, error tolerance and bio-compatibility, are most pronounced.


This image shows Ilia Polian

Ilia Polian

Prof. Dr. rer. nat. habil.

Head of Institute and Chair of Hardware Oriented Computer Science

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