Dieses Bild zeigt Hussam Amrouch

Hussam Amrouch

Herr Prof. Dr.-Ing.

Test und Diagnose von Halbleitersystemen,
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Institut für Technische Informatik
Test und Diagnose von Halbleitersystemen

Kontakt

+49 711 685 88393
 +49 711 685 88288

Pfaffenwaldring 47
D-70569 Stuttgart
Deutschland
Raum: 3.163

Fachgebiet

Neue Kontaktadresse

Telefon TUM +49 (89) 289 - 51410
Parkring 35-39/III
85748 Garching b. München
E-Mail:         amrouch(at)tum.de
Homepage: https://www.ce.cit.tum.de/aipro/

Short Bio

Hussam Amrouch is Professor (W3) heading the Chair of AI Processor Design (AI-Pro) within the Technical University of Munich (TUM) and the Munich Institute of Robotics and Machine Intelligence (MIRMI)in Germany. As a side job, he is the head of the Semiconductor Test and Reliability (STAR) within the University of Stuttgart, Germany. Prior to that, he was a Research Group Leader at the Karlsruhe Institute of Technology (KIT) where he was leading the research efforts in building dependable embedded systems. He currently serves as Editor at the Nature Scientific Reports Journal. 

Prof. Amrouch received his Ph.D. degree (Dr.-Ing.) with the highest distinction (summa cum laude) from the Karlsruhe Institute of Technology (KIT) in 2015. In 2015, he founded and led the Dependable Hardware research group at KIT and in July 2020, he was appointed as a Junior Professor at the University of Stuttgart, where he headed the Chair of Semiconductor Test and Reliability (STAR). In 2023, he was appointed to the professorship (W3) for AI Processor Design at the Technical University of Munich (TUM). He is also part of the Munich Institute of Robotics and Machine Intelligence (MIRMI) and Munich Quantum Valley (MQV).

His main research interests are design for reliability and testing from device physics to systems, machine learning for CAD, HW security, approximate computing, and emerging technologies with a special focus on ferroelectric devices. He holds eight HiPEAC Paper Awards and three best paper nominations at top EDA conferences: DAC'16, DAC'17 and DATE'17 for his work on reliability. He has served in the technical program committees of many major EDA conferences such as DAC, ASP-DAC, ICCAD, etc., and as a reviewer in many top journals like Nature Electronics, TED, TCAS-I, TVLSI, TCAD, TC, etc. He has more than 200 publications in multidisciplinary research areas (including 85 journals) across the entire computing stack, starting from semiconductor physics to circuit design all the way up to computer-aided design and computer architecture. His research in HW security and reliability have been funded by the German Research Foundation (DFG), Advantest Corporation, and the U.S. Office of Naval Research (ONR). 

  1. 14th International Workshop on Boolean Problems (IWSBP), Keynote, virtual event in Sep 2020
  2. Peking University, Beijing, China in Jan 2020.
  3. University of Nebraska–Lincoln, Nebraska, USA in Feb 2020.
  4. The 11th Latin American Electron Devices Conference (LAEDC), Costa Rica in Feb, 2020.
  5. International Conference on Modelling, Simulation & Intelligent Computing (MoSICom), Keynote, Dubai in Jan 2020.
  6. EE Distinguished Speakers Seminar at EPFL, Lausanne, Switzerland in Dec 2019.
  7. The 32nd Symposium on Integrated Circuits and Systems Design (SBCCI) in August 2019.
  8. Federal University of Rio Grande do Sul (UFRGS), Brazil in April 2019.
  9. National Chiao Tung University, Hsinchu, Taiwan in March 2019.
  10. Macronix Company (semiconductor foundry), Taipei, Taiwan in March 2019.
  11. Tsinghua University, Beijing, China in March 2019.
  12. New York University (NYU), Abu Dhabi in UAE, February 2019.
  13. University of New South Wales, Sydney (UNSW), Australia in February 2019.
  14. Silvaco, Inc., Grenoble, France in April 2018.
  15. Korea University, Seoul in August 2018.
  16. Seoul National University in August 2017.
  1. “Steep-Slope Transistors: Opportunities and Challenges - Connecting Device Physics to System-level Management –” in Design Automation Conference (DAC. Together with Prof. Sayeef Salahuddin, University of California Berkeley, USA. Year: July 2020.
  2. “A Journey from Devices to Systems with FeFETs and NCFETs” in 25th Asia and South Pacific Design Automation Conference (ASP-DAC). Together with Prof. Sharon Hu from the University of Notre Dame, USA. Year: January 2020.
  3. “Design for Reliability on in the Nano-CMOS Era” in the 32nd Symposium on Integrated Circuits and Systems Design (SBCCI), Sao Paulo, Brazil. Full tutorial alone. Year: August 2019.
  4. “Negative Capacitance Transistor (NCFET) to Rescue Technology Scaling: From Physics to System Level” in the 34th South Symposium of Microelectronics and 21st South School of Microelectronics, Pelotas, Brazil. Full tutorial alone. Year: April 2019.
  5. “Design for Reliability in the Nano-CMOS Era: New Holistic Methodologies for Reliability Modeling and Optimization” in the International Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan. Together with Prof. Sheldon Tan from University of California, Riverside. Year: January 2019.
  6. “Design for Reliability: From Devices to Systems” in the 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Prague, Czech Republic. Together with Prof. Montserrat Nafria from Universitat Autonoma de Barcelona. Year: July 2018.
  7. “Reliability: From Physics to CAD” in Design, Automation and Test in Europe (DATE), Dresden, Germany. Together with Prof. Montserrat Nafria from Universitat Autonoma de Barcelona and Prof. Norbert Wehn from TU Kaiserslautern. Year: March 2018.
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