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Multi-level simulation of security in Reconfigurable Scan Networks

Kategorie: Open Seminar - Rechnerarchitektur, SS 18

13:45 - 14:30, Hotel Zollernblick, Freudenstadt, M. Sc. Ahmed Atteya, Institut für Technische Informatik

Modern systems-on-chip (SoC) designs are requiring more and more infrastructure for validation, debug, volume test as well as in-field maintenance and repair. Reconfigurable scan networks (RSNs), as allowed by IJTAG (IEEE 1687) standard, provide flexible access to the infrastructure with low access latency. However, they can also pose a security threat to the system, through leaking information about the system state. 

In this talk, a new multi-level simulation environment will be presented. The simulation is able to represent the interaction between the RSN and the actual functional logic of the system. This is achieved through using different levels of abstraction to model the RSN (e.g. RT-Level and CSU-level). The system logic is also modeled using Transaction Level Modeling (TLM) to reduce the simulation effort. This simulation environment allows simulation of different attacks through the RSN logic as well as validation of test accesses against a given security specification.


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