On Monday, June 16, ITI-HOCOS group member Devanshi Upadhyaya has defended her PhD thesis entitled "Secure Cryptographic Hardware: Assessing Logic-Locking and Fault Attack Vulnerabilities". In her thesis, Devanshi has shown that applying logic locking protections intended to improve supply-chain security to cryptographic circuits can compromise their resistance against other, classical and physical attacks. She also improved the precision of clock-glitching fault attacks using a waveform-accurate modeling approach based on formal, Boolean-satisfiability based methods. She is currently working on a project on security of mixed-signal neural network implementations within the Priority Program Nano Security.
The photo shows Devanshi with her committee members (from left) Ralf Küsters, Francesco Regazzoni and Ilia Polian.