- Design Close to the Edge in Advanced Technology using Machine Learning and Brain-Inspired Algorithms. Hussam Amrouch; Florian Klemme and Paul R. Genssler. In 27th Asia and South Pacific Design Automation Conference (ASP-DAC’22), 2022.
- Machine Learning for On-the-fly Reliability-Aware Cell Library Characterization. Florian Klemme and Hussam Amrouch. IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) (2021).
- Impact of NCFET Technology on Eliminating the Cooling Cost and Boosting the Efficiency of Google TPU. Sami Salamin; Georgios Zervakis; Florian Klemme; Hammam Kattan; Yogesh Chauhan; Jörg Henkel and Hussam Amrouch. IEEE Transactions on Computers (TC’21) (2021).
- Machine Learning for Circuit Aging Estimation under Workload Dependency. Florian Klemme and Hussam Amrouch. In IEEE International Test Conference (ITC’21), 2021.
- Modeling Emerging Technologies using Machine Learning: Challenges and Opportunities. Florian Klemme; Jannik Prinz; Victor M. van Santen; Joerg Henkel and Hussam Amrouch. In IEEE/ACM 38th International Conference on Computer-Aided Design (ICCAD’20), 2020.
- Impact of Variability on Processor Performance in Negative Capacitance FinFET Technology. H. Amrouch; G. Pahwa; A. Gaidhane; F. Klemme; O. Prakash; C. Dabhi and Y. Chauhan. IEEE Transactions on Circuits and Systems I: Regular Paper (TCAS-I’20), 2020 (2020).
- Cell Library Characterization using Machine Learning for Design Technology Co-Optimization. Florian Klemme; Yogesh Chauhan; Joerg Henkel and Hussam Amrouch. In IEEE/ACM 38th International Conference on Computer-Aided Design (ICCAD’20), 2020.
Florian Klemme received the B.Sc. in System Integration from the University of Applied Sciences Bremerhaven, Germany, in 2014 and the M.Sc. in Computer Science from the Karlsruhe Institute of Technology, Germany, in 2018. He is currently working towards the Ph.D. degree at the Chair of Semiconductor Test and Reliability, University of Stuttgart.
His research interests include cell library characterization and machine learning techniques in the EDA design flow.