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Klemme, Florian

Florian Klemme

M.Sc.

Research Assistant
Institute of Computer Architecture and Computer Engineering
Semiconductor Test and Reliability

Contact

+49 711 685 88279
+49 711 685 88288
Email

Pfaffenwaldring 47
D-70569 Stuttgart
Deutschland
Room: 3.164

Publications

2023
1. ML to the Rescue: Reliability Estimation from Self-Heating and Aging in Transistors all the Way up Processors. Hussam Amrouch and Florian Klemme. In 28th Asia and South Pacific Design Automation Conference (ASP-DAC), 2023.
  - BibTeX
  BibTeX
  @inproceedings{aspdac23_SS_Florian, abteilung = {star}, author = {Amrouch, Hussam and Klemme, Florian}, booktitle = {28th Asia and South Pacific Design Automation Conference (ASP-DAC)}, month = {01}, title = {ML to the Rescue: Reliability Estimation from Self-Heating and Aging in Transistors all the Way up Processors}, year = 2023 }
2. Cryogenic Embedded System to Support Quantum Computing: From 5nm FinFET to Full Processor. Paul R. Genssler; Florian Klemme; Shivendra Singh Parihar; Sebastian Brandhofer; Girish Pahwa; Ilia Polian; Yogesh Singh Chauhan and Hussam Amrouch. IEEE Transactions on Quantum Engineering (2023). DOI: https://doi.org/10.1109/TQE.2023.3300833
  - BibTeX
  - DOI
  BibTeX
  @article{cryo2023tqe, abteilung = {star hocos}, author = {Genssler, Paul R. and Klemme, Florian and Parihar, Shivendra Singh and Brandhofer, Sebastian and Pahwa, Girish and Polian, Ilia and Chauhan, Yogesh Singh and Amrouch, Hussam}, doi = {10.1109/TQE.2023.3300833}, journal = {IEEE Transactions on Quantum Engineering}, title = {Cryogenic Embedded System to Support Quantum Computing: From 5nm FinFET to Full Processor}, year = 2023 }
  DOI
  10.1109/TQE.2023.3300833
3. Learning-Oriented Reliability Improvement of Computing Systems From Transistor to Application Level. Behnaz Ranjbar; Florian Klemme; Paul R. Genssler; Hussam Amrouch; Jinhyo Jung; Shail Dave; Hwisoo So; Kyongwoo Lee; Aviral Shrivastava; Ji-Yung Lin; Pieter Weckx; Subrat Mishra; Francky Catthoor; Dwaipayan Biswas and Akash Kumar. In Proceedings of the Conference on Design, Automation & Test in Europe (DATE’23), Antwerp, Belgium, 2023.
  - BibTeX
  BibTeX
  @inproceedings{DATE23_SS_MLReliability, abteilung = {star}, author = {Ranjbar, Behnaz and Klemme, Florian and Genssler, Paul R. and Amrouch, Hussam and Jung, Jinhyo and Dave, Shail and So, Hwisoo and Lee, Kyongwoo and Shrivastava, Aviral and Lin, Ji-Yung and Weckx, Pieter and Mishra, Subrat and Catthoor, Francky and Biswas, Dwaipayan and Kumar, Akash}, booktitle = {Proceedings of the Conference on Design, Automation \& Test in Europe (DATE'23)}, location = {Antwerp, Belgium}, month = {04}, title = {Learning-Oriented Reliability Improvement of Computing Systems From Transistor to Application Level}, year = 2023 }
4. Design Automation for Cryogenic CMOS Circuits. Victor van Santen; Marcel Walter; Florian Klemme; Shivendra Parihar; Girish Pahwa; Yogesh Chauhan; Robert Wille and Hussam Amrouch. In Proceedings of the 60th Annual Design Automation Conference (DAC’23), San Francisco, USA, 2023.
  - BibTeX
  BibTeX
  @inproceedings{DAC23_cryo, abteilung = {star}, author = {van Santen, Victor and Walter, Marcel and Klemme, Florian and Parihar, Shivendra and Pahwa, Girish and Chauhan, Yogesh and Wille, Robert and Amrouch, Hussam}, booktitle = {Proceedings of the 60th Annual Design Automation Conference ({DAC'23})}, location = {San Francisco, USA}, title = {Design Automation for Cryogenic CMOS Circuits}, year = 2023 }
5. Robust Resistive Open Defect Identification Using Machine Learning with Efficient Feature Selection. Zahra Paria Najafi-Haghi; Florian Klemme; Hanieh Jafarzadeh; Hussam Amrouch and Hans-Joachim Wunderlich. In To appear in Proceedings of the IEEE Conference on Design, Automation & Test in Europe (DATE’23), Antwerp, Belgium, 2023.
  - BibTeX
  BibTeX
  @inproceedings{Najafi2023DATE, abteilung = {star,ra}, author = {Najafi-Haghi, Zahra Paria and Klemme, Florian and Jafarzadeh, Hanieh and Amrouch, Hussam and Wunderlich, Hans-Joachim}, booktitle = {To appear in Proceedings of the IEEE Conference on Design, Automation & Test in Europe (DATE'23)}, location = {Antwerp, Belgium}, month = {04}, project = {FAST}, title = {Robust Resistive Open Defect Identification Using Machine Learning with Efficient Feature Selection}, year = 2023 }
6. Robust Pattern Generation for Small Delay Faults under Process Variations. Hanieh Jafarzadeh; Florian Klemme; Jan Dennis Reimer; Zahra Paria Najafi-Haghi; Hussam Amrouch; Sybille Hellebrand and Hans-Joachim Wunderlich. In To appear in the Proceedings of the IEEE International Test Conference (ITC’23), Disneyland, Anaheim, USA, 2023.
  - Abstract
  - BibTeX
  Abstract
  Small Delay Faults (SDFs) introduce additional delays smaller than the capture time and require timing-aware test pattern generation. Since process variations can invalidate the effectivity of such patterns, different circuit instances may show a different fault coverage. This paper presents a method to generate test pattern sets for SDFs which are valid for all circuit timings. The method overcomes the complexity limitations of known timing-aware Automatic Test Pattern Generation (ATPG) which has to use fault sampling under process variations. A statistical learning scheme maximises the coverage of SDFs in an entire circuit population following the variation parameters of a calibrated industrial FinFET transistor model. The method combines efficient ATPG for Transition Faults with fast timing-aware fault simulation on GPUs. Experiments show that the size of the pattern set is significantly reduced in comparison to standard N-detect while the fault coverage even increases compared to both N-detect and timing-aware ATPG
  BibTeX
  @inproceedings{JafarKRNAHW_2023, abstract = {Small Delay Faults (SDFs) introduce additional delays smaller than the capture time and require timing-aware test pattern generation. Since process variations can invalidate the effectivity of such patterns, different circuit instances may show a different fault coverage. This paper presents a method to generate test pattern sets for SDFs which are valid for all circuit timings. The method overcomes the complexity limitations of known timing-aware Automatic Test Pattern Generation (ATPG) which has to use fault sampling under process variations. A statistical learning scheme maximises the coverage of SDFs in an entire circuit population following the variation parameters of a calibrated industrial FinFET transistor model. The method combines efficient ATPG for Transition Faults with fast timing-aware fault simulation on GPUs. Experiments show that the size of the pattern set is significantly reduced in comparison to standard N-detect while the fault coverage even increases compared to both N-detect and timing-aware ATPG}, abteilung = {star,ra}, author = {Jafarzadeh, Hanieh and Klemme, Florian and Reimer, Jan Dennis and Najafi-Haghi, Zahra Paria and Amrouch, Hussam and Hellebrand, Sybille and Wunderlich, Hans-Joachim}, booktitle = {To appear in the Proceedings of the IEEE International Test Conference (ITC'23)}, location = {Disneyland, Anaheim, USA}, month = {10}, project = {ACCROSS}, title = {{Robust Pattern Generation for Small Delay Faults under Process Variations}}, year = 2023 }
7. Challenges in Machine Learning Techniques to Estimate Reliability from Transistors to Circuits. Victor van Santen; Florian Klemme; Paul R. Genssler and Hussam Amrouch. In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2023.
  - BibTeX
  BibTeX
  @inproceedings{reliability2023dft, abteilung = {star}, author = {van Santen, Victor and Klemme, Florian and Genssler, Paul R. and Amrouch, Hussam}, booktitle = {IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)}, title = {Challenges in Machine Learning Techniques to Estimate Reliability from Transistors to Circuits}, year = 2023 }
8. Upheaving Self-Heating Effects from Transistor to Circuit Level using Conventional EDA Tool Flows. Florian Klemme; Sami Salamin and Hussam Amrouch. In Proceedings of the Conference on Design, Automation & Test in Europe (DATE’23), Antwerp, Belgium, 2023.
  - BibTeX
  BibTeX
  @inproceedings{DATE23_Florian, abteilung = {star}, author = {Klemme, Florian and Salamin, Sami and Amrouch, Hussam}, booktitle = {Proceedings of the Conference on Design, Automation \& Test in Europe (DATE'23)}, location = {Antwerp, Belgium}, month = {04}, title = {Upheaving Self-Heating Effects from Transistor to Circuit Level using Conventional EDA Tool Flows}, year = 2023 }
2022
1. Intelligent Methods for Test and Reliability. Hussam Amrouch; Jens Anders; Steffen Becker; Maik Betka; Gerd Bleher; Peter Domanski; Nourhan Elhamawy; Thomas Ertl; Athanasios Gatzastras; Paul R. Genssler; Sebastian Hasler; Martin Heinrich; André van Hoorn; Hanieh Jafarzadeh; Ingmar Kallfass; Florian Klemme; Steffen Koch; Ralf Küsters; Andrés Lalama; Raphael Latty; Yiwen Liao; Natalia Lylina; Zahra Paria Najafi-Haghi; Dirk Pflüger; Ilia Polian; Jochen Rivoir; Matthias Sauer; Denis Schwachhofer; Steffen Templin; Christian Volmer; Stefan Wagner; Daniel Weiskopf; Hans-Joachim Wunderlich; Bin Yang and Martin Zimmermann. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2022, 2022, pp. 1–6.
  - BibTeX
  BibTeX
  @inproceedings{date2022GS, abteilung = {star,hocos,ra}, author = {Amrouch, Hussam and Anders, Jens and Becker, Steffen and Betka, Maik and Bleher, Gerd and Domanski, Peter and Elhamawy, Nourhan and Ertl, Thomas and Gatzastras, Athanasios and Genssler, Paul R. and Hasler, Sebastian and Heinrich, Martin and Hoorn, André van and Jafarzadeh, Hanieh and Kallfass, Ingmar and Klemme, Florian and Koch, Steffen and Küsters, Ralf and Lalama, Andrés and Latty, Raphael and Liao, Yiwen and Lylina, Natalia and Najafi-Haghi, Zahra Paria and Pflüger, Dirk and Polian, Ilia and Rivoir, Jochen and Sauer, Matthias and Schwachhofer, Denis and Templin, Steffen and Volmer, Christian and Wagner, Stefan and Weiskopf, Daniel and Wunderlich, Hans-Joachim and Yang, Bin and Zimmermann, Martin}, booktitle = {Design, Automation & Test in Europe Conference & Exhibition, DATE 2022}, month = {03}, pages = {1–6}, place = {Antwerp, Belgium}, title = {Intelligent Methods for Test and Reliability}, year = 2022 }
2. On Extracting Reliability Information from Speed Binning. Zahra Paria Najafi-Haghi; Florian Klemme; Hussam Amrouch and Hans-Joachim Wunderlich. In Proceedings of the 27th IEEE European Test Symposium (ETS’22), Barcelona, Spain, 2022. DOI: https://doi.org/10.1109/ETS54262.2022.9810443
  Abstract
  Adaptive Voltage Frequency Scaling (AVFS) is an important means to overcome process-induced variability challenges for advanced high-performance circuits. AVFS requires and allows determining the maximum speed Fmax(Vdd) reachable under a set of certain operation voltages Vdd. In this paper, it is shown that the Fmax(Vdd) measurements contain relevant data to identify some hidden defects in a chip which are reliability threats and can cause device failures, but pass the speed binning procedure within the given specifications. Static Timing Analysis (STA) is applied to a circuit designed by using standard cell libraries in which the underlying transistors along with process variations have been carefully calibrated against industrial 14nm FinFET measurement data, and instances with and without injected small resistive open defects are generated. From the slope of the function Fmax(Vdd), a machine learning procedure can identify some defects with high accuracy and few false positives. These chips can be then discarded without any further need and cost for testing. It has to be noted that this reliability information comes for free from the data which is already generated, and does not need any additional measurements.
  BibTeX
  @inproceedings{NajafKAW22, abstract = {Adaptive Voltage Frequency Scaling (AVFS) is an important means to overcome process-induced variability challenges for advanced high-performance circuits. AVFS requires and allows determining the maximum speed Fmax(Vdd) reachable under a set of certain operation voltages Vdd. In this paper, it is shown that the Fmax(Vdd) measurements contain relevant data to identify some hidden defects in a chip which are reliability threats and can cause device failures, but pass the speed binning procedure within the given specifications. Static Timing Analysis (STA) is applied to a circuit designed by using standard cell libraries in which the underlying transistors along with process variations have been carefully calibrated against industrial 14nm FinFET measurement data, and instances with and without injected small resistive open defects are generated. From the slope of the function Fmax(Vdd), a machine learning procedure can identify some defects with high accuracy and few false positives. These chips can be then discarded without any further need and cost for testing. It has to be noted that this reliability information comes for free from the data which is already generated, and does not need any additional measurements.}, abteilung = {star,ra}, address = {Barcelona, Spain}, author = {Najafi-Haghi, Zahra Paria and Klemme, Florian and Amrouch, Hussam and Wunderlich, Hans-Joachim}, booktitle = {Proceedings of the 27th IEEE European Test Symposium (ETS’22)}, day = {23--25}, doi = {10.1109/ETS54262.2022.9810443}, month = {05}, owner = {haefneht}, project = {FAST}, title = {On Extracting Reliability Information from Speed Binning}, url = {https://www.iti.uni-stuttgart.de/fileadmin/rami/files/publications/2022/ETS_NajafKAW2022.pdf}, year = 2022 }
  Link
  https://www.iti.uni-stuttgart.de/fileadmin/rami/files/publications/2022/ETS_NajafKAW2022.pdf
  DOI
  10.1109/ETS54262.2022.9810443
3. Mitigating the Complexity of Chip Designs with ML-based Cell Library Characterization. Florian Klemme and Hussam Amrouch. In Workshop on Intelligent Methods for Test and Reliability (IMTR’22), 2022.
  - BibTeX
  BibTeX
  @inproceedings{klemme_imtr22, abteilung = {star}, author = {Klemme, Florian and Amrouch, Hussam}, booktitle = {Workshop on Intelligent Methods for Test and Reliability (IMTR'22)}, month = {05}, title = {Mitigating the Complexity of Chip Designs with ML-based Cell Library Characterization}, year = 2022 }
4. Efficient Learning Strategies for Machine Learning-based Cell Library Characterization. Florian Klemme and Hussam Amrouch. IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) (2022).
  - BibTeX
  BibTeX
  @article{TCASI_florian22, abteilung = {star}, author = {Klemme, Florian and Amrouch, Hussam}, journal = {IEEE Transactions on Circuits and Systems I: Regular Papers ({TCAS-I}) }, title = {Efficient Learning Strategies for Machine Learning-based Cell Library Characterization}, year = 2022 }
5. Machine Learning for Reliability-Aware, yet Confidential Standard Cell Characterization. Florian Klemme and Hussam Amrouch. In The 34th Workshop on Test Methods and Reliability of Circuits and Systems (TuZ’22), 2022.
  - BibTeX
  BibTeX
  @inproceedings{klemme_tuz22, abteilung = {star}, author = {Klemme, Florian and Amrouch, Hussam}, booktitle = {The 34th Workshop on Test Methods and Reliability of Circuits and Systems (TuZ'22)}, month = {02}, title = {Machine Learning for Reliability-Aware, yet Confidential Standard Cell Characterization}, year = 2022 }
6. GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation. Lilas Alrahis; Johann Knechtel; Florian Klemme; Hussam Amrouch and Ozgur Sinanoglu. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD’22), ESWEEK Special Issue (2022).
  - BibTeX
  BibTeX
  @article{TCAD22_GNN, abteilung = {star}, author = {Alrahis, Lilas and Knechtel, Johann and Klemme, Florian and Amrouch, Hussam and Sinanoglu, Ozgur}, journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD'22), ESWEEK Special Issue}, title = {GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation}, year = 2022 }
7. Efficient Learning Strategies for Machine Learning-Based Characterization of Aging-Aware Cell Libraries. Florian Klemme and Hussam Amrouch. IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) (2022). DOI: https://doi.org/10.1109/TCSI.2022.3201431
  - BibTeX
  - DOI
  BibTeX
  @article{TCASI_florian22, abteilung = {star}, author = {Klemme, Florian and Amrouch, Hussam}, doi = {10.1109/TCSI.2022.3201431}, journal = {IEEE Transactions on Circuits and Systems I: Regular Papers ({TCAS-I}) }, title = {Efficient Learning Strategies for Machine Learning-Based Characterization of Aging-Aware Cell Libraries}, year = 2022 }
  DOI
  10.1109/TCSI.2022.3201431
8. Scalable Machine Learning to Estimate the Impact of Aging on Circuits under Workload Dependency. Florian Klemme and Hussam Amrouch. IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) (2022).
  - BibTeX
  BibTeX
  @article{TCASI22_klemme_amrouch, abteilung = {star}, author = {Klemme, Florian and Amrouch, Hussam}, journal = {IEEE Transactions on Circuits and Systems I: Regular Papers ({TCAS-I})}, title = {Scalable Machine Learning to Estimate the Impact of Aging on Circuits under Workload Dependency}, year = 2022 }
9. Design Close to the Edge in Advanced Technology using Machine Learning and Brain-Inspired Algorithms. Hussam Amrouch; Florian Klemme and Paul R. Genssler. In 27th Asia and South Pacific Design Automation Conference (ASP-DAC’22), 2022.
  - BibTeX
  BibTeX
  @inproceedings{aspdac22_SS, abteilung = {star}, author = {Amrouch, Hussam and Klemme, Florian and Genssler, Paul R.}, booktitle = {27th Asia and South Pacific Design Automation Conference (ASP-DAC'22)}, month = {01}, title = {Design Close to the Edge in Advanced Technology using Machine Learning and Brain-Inspired Algorithms}, year = 2022 }
10. Variability-Aware Approximate Circuit Synthesis via Genetic Optimization. Konstantinos Balaskas; Florian Klemme; Georgios Zervakis; Kostas Siozios; Hussam Amrouch and Jörg Henkel. IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) (2022).
  - BibTeX
  BibTeX
  @article{TCAS1_22, abteilung = {star}, author = {Balaskas, Konstantinos and Klemme, Florian and Zervakis, Georgios and Siozios, Kostas and Amrouch, Hussam and Henkel, Jörg}, journal = {IEEE Transactions on Circuits and Systems I: Regular Papers ({TCAS-I})}, title = {Variability-Aware Approximate Circuit Synthesis via Genetic Optimization}, year = 2022 }
2021
1. Machine Learning for Circuit Aging Estimation under Workload Dependency. Florian Klemme and Hussam Amrouch. In IEEE International Test Conference (ITC’21), 2021.
  - BibTeX
  BibTeX
  @inproceedings{ITC_florian, abteilung = {star}, author = {Klemme, Florian and Amrouch, Hussam}, booktitle = {IEEE International Test Conference (\textbf{ITC'21})}, month = {10}, title = {Machine Learning for Circuit Aging Estimation under Workload Dependency}, year = 2021 }
2. Machine Learning for On-the-fly Reliability-Aware Cell Library Characterization. Florian Klemme and Hussam Amrouch. IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) (2021).
  - BibTeX
  BibTeX
  @article{TCASI_Florian, abteilung = {star}, author = {Klemme, Florian and Amrouch, Hussam}, journal = {IEEE Transactions on Circuits and Systems I: Regular Papers (\textbf{TCAS-I})}, title = {Machine Learning for On-the-fly Reliability-Aware Cell Library Characterization}, year = 2021 }
3. Impact of NCFET Technology on Eliminating the Cooling Cost and Boosting the Efficiency of Google TPU. Sami Salamin; Georgios Zervakis; Florian Klemme; Hammam Kattan; Yogesh Chauhan; Jörg Henkel and Hussam Amrouch. IEEE Transactions on Computers (TC’21) (2021).
  - BibTeX
  BibTeX
  @article{TC20_sami, abteilung = {star}, author = {Salamin, Sami and Zervakis, Georgios and Klemme, Florian and Kattan, Hammam and Chauhan, Yogesh and Henkel, J{\"o}rg and Amrouch, Hussam}, journal = {IEEE Transactions on Computers (\textbf{TC'21})}, title = {Impact of NCFET Technology on Eliminating the Cooling Cost and Boosting the Efficiency of Google TPU}, year = 2021 }
2020
1. Cell Library Characterization using Machine Learning for Design Technology Co-Optimization. Florian Klemme; Yogesh Chauhan; Joerg Henkel and Hussam Amrouch. In IEEE/ACM 38th International Conference on Computer-Aided Design (ICCAD’20), 2020.
  - BibTeX
  BibTeX
  @inproceedings{Klemme_ICCAD20, abteilung = {star}, author = {Klemme, Florian and Chauhan, Yogesh and Henkel, Joerg and Amrouch, Hussam}, booktitle = {IEEE/ACM 38th International Conference on Computer-Aided Design (\textbf{ICCAD'20})}, month = {11}, title = {Cell Library Characterization using Machine Learning for Design Technology Co-Optimization}, year = 2020 }
2. Impact of Variability on Processor Performance in Negative Capacitance FinFET Technology. H. Amrouch; G. Pahwa; A. Gaidhane; F. Klemme; O. Prakash; C. Dabhi and Y. Chauhan. IEEE Transactions on Circuits and Systems I: Regular Paper (TCAS-I’20), 2020 (2020).
  - BibTeX
  BibTeX
  @article{TCASI20_2, abteilung = {star}, author = {Amrouch, H. and Pahwa, G. and Gaidhane, A. and Klemme, F. and Prakash, O. and Dabhi, C. and Chauhan, Y.}, journal = {IEEE Transactions on Circuits and Systems I: Regular Paper (\textbf{TCAS-I'20}), 2020}, title = {Impact of Variability on Processor Performance in Negative Capacitance FinFET Technology}, year = 2020 }
3. Modeling Emerging Technologies using Machine Learning: Challenges and Opportunities. Florian Klemme; Jannik Prinz; Victor M. van Santen; Joerg Henkel and Hussam Amrouch. In IEEE/ACM 38th International Conference on Computer-Aided Design (ICCAD’20), 2020.
  - BibTeX
  BibTeX
  @inproceedings{Klemme_ICCAD20_SS, abteilung = {star}, author = {Klemme, Florian and Prinz, Jannik and van Santen, Victor M. and Henkel, Joerg and Amrouch, Hussam}, booktitle = {IEEE/ACM 38th International Conference on Computer-Aided Design (\textbf{ICCAD'20})}, month = {11}, title = {Modeling Emerging Technologies using Machine Learning: Challenges and Opportunities}, year = 2020 }

Florian Klemme received the B.Sc. in System Integration from the University of Applied Sciences Bremerhaven, Germany, in 2014 and the M.Sc. in Computer Science from the Karlsruhe Institute of Technology, Germany, in 2018. He is currently working towards the Ph.D. degree at the Chair of Semiconductor Test and Reliability, University of Stuttgart.

His research interests include cell library characterization and machine learning techniques in the EDA design flow.

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