This image shows Paul R. Genssler

Dipl.-Inf.

Paul R. Genssler

Research Assistant
Institute of Computer Architecture and Computer Engineering
Semiconductor Test and Reliability

Contact

+49 711 685 88370
+49 711 685 88288

Pfaffenwaldring 47
D-70569 Stuttgart
Deutschland
Room: 3.170

  1. 2022

    1. Design Close to the Edge in Advanced Technology using Machine  Learning and Brain-Inspired Algorithms. Hussam Amrouch; Florian Klemme and Paul R. Genssler. In 27th Asia and South Pacific Design Automation Conference  (ASP-DAC’22), 2022.
  2. 2021

    1. On the Reliability of FeFET On-Chip Memory. Paul R. Genssler; Victor M. van Santen; Joerg Henkel and Hussam Amrouch. IEEE Transactions on Computers (TC’21) (2021).
    2. Brain-Inspired Computing for Wafer Map Defect Pattern Classification. Paul R. Genssler and Hussam Amrouch. In IEEE International Test Conference (ITC’21), 2021.
  3. 2020

    1. BTI and HCI Degradation in a Complete 32X64 bit SRAM Array – including Sense Amplifiers and Write Drivers – under Processor Activity. Victor van Santen; Simon Thomann; C. Pasupuleti; P. Genssler; N. Gangwar; U. Sharma; J. Henkel; S. Mahapatra and H. Amrouch. In Proceedings of the IEEE 58th International Reliability Physics Symposium  (IRPS’20), Dallas, Texas, U.S., Dallas, Texas, 2020.
    2. Impact of Self-Heating On Performance, Power and Reliability in FinFET Technology. Victor M. van Santen; Paul R. Genssler; Om Prakash; S. Thomann; Jörg Henkel and Hussam Amrouch. In 25th Asia and South Pacific Design Automation Conference (ASP-DAC’20, 2020.

Paul R. Genssler is pursuing his PhD under the supervision of Prof. Dr.-Ing. Hussam Amrouch at the Chair of Semiconductor Test and Reliability since 2020. Before that, he worked at the Chair for Embedded Systems at Karlsruhe Institute of Technology and the Chair for VLSI - Design, Diagnostics and Architecture at TU Dresden. He received his Diploma degree (Master's level) - with distinction - in Computer Science from TU Dresden in 2017.

His research interests include emerging non-volatile memories, programmable hardware, and machine learning for test methods for semiconductors.

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