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Projects

INTESYS: Model-Based Test Generation for the Efficient Test of Hardware/Software Systems

Projectpage: Model-Based Test Generation for the Efficient Test of Hardware/Software Systems

Functionality in embedded systems is more and more realized by integrated hardware / software systems. Typically, these systems are strongly coupled with technical processes, as for instance the control of a vehicle, which show time-dependent, discrete-continuous dynamics. Testing for the correct functionality of their according design as well as of the final product contributes large sums to the production costs due to its complexity. An efficient method is required for the integrated test of hardware and software in these systems, which respects all the aspects of validation, debug, test and diadnosis.
Model-based development and test gains importance in research and also in industrial practice, as they support the systematic, stepwise refinement of requirements down to the implementation. By using models to describe the functionality of integrated hard- and software systems a higher efficiency of their test can be achieved. The central goal of this project is the generation of tests for the functionality and structure of an embedded hardware / software system from its system model along with an automatic evaluation and failure diagnosis.

since 10.2010, DFG-Project: WU 245/9-1    

Diana: BMBF Project: End-to-End Diagnostic Capabilities for Automotive Electronics Systems

Project page: BMBF Project: End-to-End Diagnostic Capabilities for Automotive Electronics Systems

Together, AUDI AG, Continental AG, Infineon Technologies AG and ZMD AG are researching ways to improve the analytic and diagnostic capabilities of electronic control units (ECU) in motor vehicles. Through to 2013, the four partners, headed by Infineon, will work on ways to make error detection more precise and faults easier to rectify for automakers and repair shops. The project partners will be assisted by several research organizations and universities: the Fraunhofer Institute for Integrated Circuits in Dresden, the University of the Federal Armed Forces in Munich, and the Universities of Cottbus, Erlangen-Nuremberg, and Stuttgart.

since 07.2010, BMBF-Project    

DIADEM: Eingebettete Diagnose- und Debugmethoden für VLSI Systeme in Nanometer-Technologie

Projectpage: Eingebettete Diagnose- und Debugmethoden für VLSI Systeme in Nanometer-Technologie

Modern manufacturing processes are subject to high variations and a high sensitivity during operation. This project addresses the need for innovative embedded diagnosis solutions for such systems to reduce time-to-market with reasonable costs.

06.2006 - 05.2009, DFG-Project: WU 245/4-1    

Researcher Group: Concepts and Methods for Reliability Evaluation of Mechatronic Systems in Early Development Phases

Projectpage: Concepts and Methods for Reliability Evaluation of Mechatronic Systems in Early Development Phases

Assuring a certain reliability level for mechatronic systems becomes more and more important as human life is affected by it. For a careful estimation of the system reliability not only the reliability of each individual component has to be taken into account but also the interaction among the components. In this project, tools and methodologies to improve reliability on the electronic layer of such systems are developed.

09.2002 - 12.2009, DFG-Researcher Group: WU 245/3-1, 3-2, 3-3    

Publications

Books / Book Chapters

Journals / Conferences

  • XP-SISR: Eingebaute Selbstdiagnose für Schaltungen mit Prüfpfad
    M. Elm, H.-J. Wunderlich
    GMM-aktuell in MECHATRONIK, Dezember 2010

Workshops etc.

Teaching

Labs

  • Elements of High-Performance RISC Processors - Design and Synthesis
    in (SS 08), (WS 08/09), (SS 09), (WS 09/10), (WS 10/11)

Lectures and Exercises

  • Algorithmen und Methoden zur Entwurfsautomatisierung in der Nano- und Mikroelektronik
    in (SS 07), (SS 08)

  • Design and Test of Systems on Chip
    in (WS 06/07), (WS 07/08), (SS 09), (SS 10)

  • Hardware Based Fault Tolerance
    in (SS 11)

Supervised Master / Diploma / Study Theses and Project Work

  • Strukturelle Feldtests bei komplexen ASICs
    Diplomarbeit: Dominik Ull

  • Integration von Java-basierten DfT Tools in SystemC TLM Simulationen
    Software Project: Fabian Andres, Sebastian Halder, Tobias Weißer

  • Simulation Framework for Built-In Diagnosis of Self-Checking Circuits
    Diploma Thesis: Laura Rodríguez Gómez

  • Wrapper-Optimierung im 3D-Entwurf
    Diplomarbeit: Dennis Neuendorf

  • Practical Approach to In-Field Hardware Testing
    Study Thesis: Dominik Ull

  • Retargeting a C compiler to the HAPRA/FAPRA architecture
    Diploma Thesis: Tilmann Scheller

  • On-Chip Infrastructure for ATE Emulation
    Study Thesis: Laura Rodríguez Gómez

  • FPGA Emulation of a GALS Network-on-Chip Interconnection
    Master Thesis: Alejandro Cook

  • Efficient On-Chip Compaction of Testresponses
    Master Thesis: Bartlomiej Chechelski