SimTech: Exzellenz-Cluster "Simulation-Technology": Mapping Simulation Algorithms to NoC MPSoC Computers
Project
Technology scaling of nanoelectronic circuits currently introduces a fundamental paradigm shift of architectures for high-performance computing. Due to power and noise issues, single chip architectures have to gain increased performance by increased parallelism instead of increased frequency. Goal of this project is a methodology to map compute intensive portions of simulation algorithms to configurable Network-on-Chip Multi-Processor System on a Chip (NoC MPSoCs).
Publications
Journals and Conference Proceedings
- Reliable Simulations on Many-Core Architectures C. Braun, H.-J. Wunderlich
- Algorithmen-basierte Fehlertoleranz für Many-Core-Architekturen C. Braun, H.-J. Wunderlich
- Algorithm-based fault tolerance for many-core architectures C. Braun, H.-J. Wunderlich
International Conference on Simulation Technology (SimTech 2011), Stuttgart, Germany, June 14-17, 2011
it - Information Technology, Vol. 52, No. 4, August 2010
15th IEEE European Test Symposium (ETS), Praha, Czech Republic, May 24-28, 2010
SimTech-Status-Seminar Contributions
Internal Links
Contact People
- Prof. Dr. rer. nat. habil. Hans Joachim Wunderlich
Tel.: +49-711-685-88-391
wu@informatik.uni-stuttgart.de
- Dipl. Inform. Claus Braun
Tel.: +49-711-685-88-407
claus.braun@informatik.uni-stuttgart.de